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源码开放学ARM

LASO - Learn ARM with Source Open

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时钟输出频率

时钟输出

MSYS clock domain (H->HighPerformance P->Peripheral)
	AHB / APB
	freq(ARMCLK)  = 1000Mhz		1000M/1
	freq(HCLK_MSYS) = 200Mhz	ARMCLK/5
	freq(PCLK_MSYS) = 100Mhz	HCLK_M/2
	freq(HCLK_IMEM) = 100Mhz	HCLK_M/2

DSYS clock domain
	freq(HCLK_DSYS) = 166Mhz
	freq(PCLK_DSYS) = 83Mhz		HCLK_D/2

PSYS clock domain
	freq(HCLK_PSYS) = 133Mhz
	freq(PCLK_PSYS) = 66Mhz		HCKL_P/2
	freq(SCLK_ONENAND) = 133M/166Mhz

PLL PMS setting

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